This invention relates to high-speed, high-accuracy implementations of the discrete Fourier and discrete odd cosine transforms, suitable for signal processing applications such as sonar, radar, communication, beamforming, image data compression, etc.
Present analog high-speed transform implementations are largely based on the chirp-Z transform architecture, and require a premultiplication, a convolution, and a postmultiplication. The two most useful filter technologies for the convolution are surface wave devices and charge transfer devices. When surface acoustic wave devices are used, balanced mixers are generally used as the multipliers, and the mixers limit the attainable transform accuracy. When charge transfer devices are used as the filters, baseband multipliers are required. At present it is necessary to build these multipliers as discrete components, off the charge-coupled device (CCD) chip. The multipliers prevent the fabrication of the transform device as a single, large-scale, integrated (LSI) chip and contribute greatly to the cost of the transform system, as well as limiting the transform accuracy.
In the implementation of the odd discrete cosine transform, each permuter need permute only one real sequence, and each filter only need be one real filter.
This is distinct from the Fourier transform case where there is complex input data present, as well as a complex transform kernel.
This makes a prime cosine transform implementation much simpler than a chirp-Z cosine transform implementation, since the latter uses four real multipliers and four real filters.